1. FPGA based RL01/RL02 Emulator
 
 


DEC FPGA-based RL01/RL02 Emulator

My challenge in this project is to achieve the vintage software and preserve it on new technology. However the Software is directly dependent on the condition of the disk drive, in my case a DEC RL02 disk drive. The RL02 drive uses removable disk packs to provide 10MB of storage; twice as much as its predecessor, the RL01. After the announcement ~1980 the RL02 turned out very fast to be DEC's all-round disk drive. Although other DEC disk drives like the DEC MSCP-protocol based disk drives ( e.g. RA80 ) would be easier to simulate I nevertheless decided in favor to simulate the RL02 disk drive. My decision was based on three reasons: First: The RL02 drive was available on most of all DEC systems like PDP-8, PDP-11 and VAX systems. Second: The RL02 drive was device-driver supported running on all DEC operating systems, like OS-8, RT-11, RSX-11, MUMBS, RSTS und VMS. Third: My personal challenge and a good chance to jump into the embedded systems world.

Aim of this project: Being able to use the RL02 Emulator on all DEC vintage computer platforms.

To be able to start such a project, we need an up and running environment including a RL02 disk drive and a DEC computer system with disk controller and attached RL02 drive. These RL02 disk drives are already very rare. Unfortunately, most RL02 disk drives don't work any more. Spare parts don't exist anyway. I had it left nothing else to build an operating disk drive from 2 to 3 faulty disk drives left. For me the most difficult part was to adjust the mechanical part via Oscilloscope based on the maintenance instruction following the alignment procedure . I am glad that I was successful and the most important prerequisite for this project was available now. Another problem still is related to the disk packs. A disk pack consists of 2 data surfaces and were pre-formatted by factory and can not be reformatted. After about 25 years, the format information on the surfaces has been already decreased in most cases which may result in Read-Error or in Too-Many-Bad-Blocks.

To be able to start the project at all, I needed the appropriate hardware. The Computer-Museum in München ( http://www.computermuseum-muenchen.de/ ) put these Hardware for me more friendly wisely at disposal. The hardware consists of a Micro-PDP-11 with 11/23+ CPU + RLV-12 Controller and a RL02 disk drive.

Project start was September 2009. Since I had a knowledge gap since 1995 of more than 10 years, I had to switch me over to the new FPGA-technology bit by bit like Cyclone® II und Cyclone® IV from Altera with the programming environment based on Verilog and C/C++ .



The project started. Nostalgia is surely also my motivation reason for this project. The main reasons are the love of the vintage computers and also to realize the challenge, something worldwide there is not yet.